2208101323 Process Change Notice: EFM32JG12/PG12 Datasheet v1.3
Post time:2024-06-05 16:27:13
Poster:Innovo Technology
From:Network
●Description of Change:
■Silicon Labs is pleased to announce Data Sheet version 1.3 for EFM32JG12/PG12 families.
■Notable changes from previous revisions are:
▲Updated Real Time Counter and Calendar (RTCC) to remove AUXHFRCO as a clock source.
▲Removed BIASPROG = 1, FULLBIAS = 0 specifications from Analog Comparator (ACMP) Table.
▲Added HFSRCCLK frequency - General Operating Conditions.
▲Added timing specifications for RESETn low time and clarified VIL and VIH logic levels for RESETn pins - General-Purpose I/O (GPIO).
▲Added SPI Master Timing Diagram (SMSDELAY = 1).
▲Added a note on BGA125 and QFN48 PCB Land Pattern Dimensions.
▲Updated Hysteresis max values - Analog Comparator (ACMP).
▲Updated note - Operational Amplifier (OPAMP) specification table.
Silicon Labs | |
EFM32JG12 、 EFM32PG12 、 EFM32JG12B500F1024GL125-C 、 EFM32JG12B500F1024GL125-CR 、 EFM32JG12B500F1024GM48-C 、 EFM32JG12B500F1024GM48-CR 、 EFM32JG12B500F1024IL125-C 、 EFM32JG12B500F1024IL125-CR 、 EFM32JG12B500F1024IM48-C 、 EFM32JG12B500F1024IM48-CR 、 EFM32PG12B500F1024GL125-C 、 EFM32PG12B500F1024GL125-CR 、 EFM32PG12B500F1024GM48-C 、 EFM32PG12B500F1024GM48-CR 、 EFM32PG12B500F1024IL125-C 、 EFM32PG12B500F1024IL125-CR 、 EFM32PG12B500F1024IM48-C 、 EFM32PG12B500F1024IM48-CR More Part# | |
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Please see the document for details | |
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English Chinese Chinese and English Japanese | |
Nov 16, 2022 | |
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2022-08-10-1323 | |
806 KB |